1. Field of the Invention
The present invention relates to semiconductor integrated circuits. More specifically, the present invention particularly relates to semiconductor integrated circuits comprising an input protection device which is suitable for receiving inputs of signals having voltages higher than the internal power supply voltage.
This application is based on patent application No. Hei 10-113050 filed in Japan, the content of which is incorporated herein by reference.
2. Description of Related Art Including Information Disclosed Under 37 CFR 1.97 and 37 CFR 1.98
In a semiconductor integrated circuit, an input protection device is normally electrically connected to an input signal conductor in order to prevent overcurrent flow due to static electricity or the like. For a semiconductor integrated circuit into which a signal with a voltage (hereinafter referred to as a xe2x80x9csignal voltagexe2x80x9d) higher than the internal power supply voltage is input from an external input terminal (hereinafter referred to as an xe2x80x9cinput terminalxe2x80x9d) of the input signal conductor, a MOS transistor having a structure which is the same as that of a MOS transistor which constitutes at least a part of the internal circuit of the semiconductor integrated circuit cannot be used as a switching element in the input protection device. This is because the thickness of the gate oxide (xe2x80x9cinternal gate oxidexe2x80x9d) of the MOS transistor in the internal circuit is optimized for the internal power supply voltage, and therefore, if a MOS transistor having the same structure as that of the MOS transistor in the internal circuit is used as the above switching element, a signal voltage higher than the internal power supply voltage is applied to the gate oxide, degrading the reliability of the semiconductor integrated circuit. The xe2x80x9cinternal power supply voltagexe2x80x9d is the voltage applied in order to drive a semiconductor integrated circuit.
Accordingly, in such a conventional input protection device which is connected to a semiconductor integrated circuit, a lateral bipolar transistor in which a field oxide is used (see Japanese Patent Application, First Publication (Kokai), No. Hei 6-188377), or a MOS transistor having a gate oxide thicker than the internal gate oxide, is used as a protection element. In the following, conventional input protection devices will be described by citing examples.
FIGS. 3A and 3B are, respectively, a sectional side view showing a structure of a lateral bipolar transistor-type protection element having a field oxide (hereinafter referred to as a xe2x80x9cfield oxide lateral bipolar transistor-type protection elementxe2x80x9d), which is formed in a P-substrate (or a P-well), and a circuit diagram showing its equivalent circuit. In a P-substrate (p-well) 6, a field oxide 11 is formed, on both sides of which heavily doped N-type diffusion layers 2 are formed. One of the heavily doped N-type diffusion layers 2 is connected to an input terminal 1, and the other is connected to a grounding terminal 5.
When a pulse with a voltage higher than the preset voltage set for the semiconductor, such as a high voltage pulse caused by static electricity, is applied to the input terminal 1, the heavily doped N-type diffusion layers 2, which are separated by the field oxide 11, and the P-type substrate (P-type well) 6 operate as a lateral NPN bipolar transistor 12, which lets overcurrent run to the grounding terminal 5, protecting the voltage converter circuit 7 and the internal circuit 8 of the semiconductor integrated circuit.
FIGS. 4A and 4B are, respectively, a sectional side view showing a structure of an n-channel MOS transistor-type protection element having a thick gate oxide and a circuit diagram showing its equivalent circuit. As with the field oxide lateral bipolar transistor-type protection element, when a high voltage pulse caused by static electricity or the like is applied to the input terminal 1, the n-channel MOS transistor (NMOS transistor) 14 operates as a parasitic NPN bipolar transistor, which lets overcurrent run to the grounding terminal 5, protecting the voltage converter circuit 7 and the internal circuit 8 of the semiconductor integrated circuit. Since a heavily doped N-type diffusion layer 2 which is formed in a P-substrate (P-well) 6, and which is connected to the input terminal 1, overlaps with the gate polysilicon 3 (see FIG. 4A), a signal voltage is applied to the gate oxide 13 during normal operation. Accordingly, when signal voltages are higher than the internal power supply voltage, the gate oxide 13 must be thick enough not to degrade the reliability under high signal voltages.
As semiconductor integrated circuits have become finer, trench structures have been replacing LOCOS structures as field isolation structures in conventional field oxide lateral bipolar transistor-type protection elements; since a field oxide as an isolation oxide in a trench structure reaches a deeper position than one in a LOCOS structure does, the base thickness in the bipolar action is thicker. Accordingly, there have been the problems that it is difficult to perform the bipolar action, and that the protective function is impaired. On the other hand, with a MOS transistor-type protection element, when signals with voltages higher than the internal power supply voltage are input to the input terminal, the gate oxide of the protection element must be thicker than the internal gate oxide. There has been a problem that this requires an increased number of production steps, and makes the production process complicated.
Japanese Patent Application, First Publication (Kokai), No. Hei 6-188377 discloses an input/output protection device for a semiconductor integrated circuit device comprising a semiconductor substrate of one conductivity type, a well of conductivity type opposite to said one conductivity type formed on the surface of the semiconductor substrate, a heavily doped source region of said one conductivity type formed on the surface of the well, a heavily doped drain region, and a thick film gate insulator, the input/output protection device being characterized in that the heavily doped drain region is connected to an external input/output terminal, that the heavily doped source region is connected to a terminal at a power supply potential, and that an external potential is not given to the well. The thick film MOS transistor structure formed by adding a gate electrode having the thick film gate insulator allows the input/output protection device to break down the reverse-biased PN junction with a low potential of the external input/output terminal when a surge pulse is applied, and accordingly, a high surge withstand voltage level can be obtained.
Japanese Patent Publication No. 2504838 discloses an input/output protection device for a semiconductor integrated circuit comprising a first conductivity type diffused resistor connected to an external terminal, the first conductivity type diffused resistor being formed in a second conductivity type well in a region which is electrically isolated from a second conductivity type substrate by being surrounded by a first conductivity type buried layer and a first conductivity type well in which a first conductivity type diffused layer which is connected to a terminal at a power supply potential, the protection device being characterized in that a MOS transistor is inserted in which a gate terminal is connected to the first conductivity type diffused resistor which is connected to the external terminal, a drain terminal is connected to a second conductivity type diffused layer which is formed in the second conductivity type well, and a source terminal is connected to a ground potential. This structure prevents the second conductivity type well from accumulating electrical charge even if the potential of the input terminal is fixed to the power supply voltage level, and allows the semiconductor integrated circuit to operate without loosing its inherent performance even after the potential of the input terminal is switched to the L level after the semiconductor integrated circuit has been operated for a substantial length of time.
In view of the circumstances described above, a semiconductor integrated circuit having an input protection device which is capable of taking inputs of signals with voltages higher than the internal power supply voltage, which may have a trench structure employed as a field isolation structure, and which is suitable for receiving inputs of signals with voltages higher than the internal power supply voltage has been desired. Accordingly, the object of the present invention is to provide a semiconductor integrated circuit comprising an input protection device which is suitable for receiving inputs of signals having voltages higher than the internal power supply voltage.
In order to achieve the above object, the present invention provides a semiconductor integrated circuit comprising an input protection device which comprises a switching element and which is interposed between an input signal conductor and a grounding conductor so as to provide conduction from the input signal conductor to the grounding conductor when a signal voltage higher than a preset value is applied, wherein the switching element is an offset MOS transistor.
According to the above construction, even if the field isolation structure is in a trench structure instead of a LOCOS structure, a signal with a voltage higher than the internal power supply voltage can be input without impairing the protective function against overcurrent caused by static electricity or the like. In addition, since a voltage of an input signal is not applied to the gate oxide during normal operation, the thickness of the gate oxide of the input protection device (protection element) can be the same as that of the internal gate oxide. Accordingly, when the input protection device is formed in the production steps of the semiconductor integrated circuit, the process for producing such a semiconductor integrated circuit is simple, without necessitating the addition of a new step to conventional production steps.
In this specification, an xe2x80x9coffset MOS transistorxe2x80x9d means a MOS transistor in which either one of the source region and the drain region of the MOS transistor is offset, or set back, from the gate electrode of the MOS transistor, whereby the interface of said one region and the interface of the gate electrode, which are adjacent to each other, are separated at a predetermined distance. The predetermined distance is determined taking account of various parameters such as the voltages of the signals to be input and the internal power supply voltage.
A semiconductor integrated circuit according to the present invention is particularly effective where signals with voltages higher than that of the internal power supply voltage are input thereto through an input signal conductor.